Some image sensors are semiconductor devices that convert optical images into electric signals. Two categories of image sensors are charge coupled devices (CCD) and complementary metal oxide semiconductor (CMOS) image sensors. A CCD may have MOS (Metal-Oxide-Silicon) capacitors that are relatively close to each other, that store and transfer charge carriers. A CMOS image sensor may employ a switching mode to detect an output by using MOS transistors. The MOS transistors may correspond to a number of pixels, that employ CMOS technology. Peripheral devices, such as a control circuit and a signal processing circuit, may work with the MOS transistors.
However, driving of CCD image sensors may be relatively complicated and have a relatively large power consumption. Forming a CCD image sensor may require multi-step mask processes, which may make it difficult to integrate a signal processing circuit on the same chip as a CCD. As a substitute for CCD image sensors, CMOS image sensors have been developed that mitigate some disadvantages of CCD image sensors. CMOS image sensors may utilize sub-micron CMOS technology.
CMOS image sensors may generate an image by sequentially detecting signals in a switching mode using photodiodes and MOS transistors in a pixel array. CMOS image sensors may consume relatively low power. CMOS image sensors may require a relatively small number of mask processes (e.g. which may require about 20 different masks), which makes a manufacturing process relatively simple compared to a manufacturing process for a CCD image sensor (e.g. which may require between 30-40 masks). Accordingly, signal processing circuits may be integrated into the same chip as CMOS image sensors, which may allow for a relatively compact product and maximize the number of applications.
Relatively highly integrated semiconductor devices may include self aligned silicide (salicide) technology to reduce resistance. Salicide technology may be implemented by simultaneously stacking refractory metal and applying a heat treatment on exposed portions of silicon and an insulating layer to form a salicide layer on a gate electrode and a source/drain. Salicide technology may be used in a semiconductor manufacturing process to reduce contact resistance of a transistor driving circuit.
CMOS image sensors may be manufactured using salicide technology to improve response speed. However, since a CMOS image sensor includes photodiodes that receive light, a salicide process should be performed selectively to prevent damage to the photodiodes from the salicide process.
Example FIG. 1 illustrates a photoresist pattern in a salicide blocking layer. Example FIG. 2 illustrates an etching process that patterns a salicide blocking layer. When forming a photoresist pattern and performing wet etching on a salicide blocking layer, the slope of the photoresist pattern may approach approximately 90°. Accordingly, etchant may flow into an interfacial surface between the photoresist pattern and the salicide blocking layer, which may result in a salicide blocking layer being etched relatively deep.
As semiconductor technology has developed, design rules have become micro-sized, which may contribute to occurrence of an undercut phenomenon at the sides of a photoresist pattern. Undercutting may cause a pixel area to unintentionally include salicide, which may degrade characteristics of a CMOS image sensor. When salicide is formed in a photodiode, dark current may occur, which may cause a dark defect. When a wet etching process is performed with respect to a salicide blocking layer, undercutting may not be uniformly formed, since a semiconductor substrate may be rotated in one direction.